The present invention pertains to the fabrication and assembly of microelectronic devices and related components. More particularly, the present invention relates to an interposer to couple a microelectronic device package to a circuit board.
In microelectronic device manufacturing, a microelectronic circuit chip, or xe2x80x9cdiexe2x80x9d, is commonly mounted to a xe2x80x9cpackagexe2x80x9d before it is integrated into a larger system. The package serves to protect the die and may provide a standardized interface between the die and the system in which it will be used. The package with the integrated die is subsequently mounted to a printed circuit board (PCB), such as a motherboard in a computer system.
One common technology for connecting these components together is the ball grid array (BGA), an array of round solder balls that form the input/output (I/O) terminals between the components. FIG. 1 shows an example of the current state of the art for attaching BGA components to PCBs. A semiconductor die 1 is mounted to a package 2 by solder balls 4 in a first BGA. The package 2 is coupled to a PCB substrate 3 (e.g., a motherboard) by solder balls 5 in a second BGA, which may be of a different size and/or composition than solder balls 4 which couple the die 1 to the package 2.
With each device generation, the number of inputs and outputs required in microelectronic devices tends to increase. This trend increases the I/O density requirements for ball grid arrays (BGAs). Thus far, the increase in I/O density requirements has been handled mainly by reducing the solder ball pitch in the BGA. Solder ball pitch is the shortest distance of one ball to the next ball. A reduction in pitch of a BGA requires scaling down the size the solder balls to be proportionally smaller in diameter. However, smaller diameter solder balls produce a smaller standoff height between the package and the PCB and reduce solder joint strength. This reduction in solder ball strength can cause solder joint fatigue during thermal cycling and result in electrically open solder joints.
Under-fill epoxy can be used to improve mechanical solder joint strength and is sometimes used to improve mechanical bonding of the package to the PCB. The under-fill process is expensive, however, and is not conducive to current high volume surface mount technology (SMT) for motherboard manufacturers. The epoxy under-fill process also is problematic with larger BGAs, where under-fill cannot reliability fill under the package completely. Furthermore, the epoxy under-fill process makes it difficult if not impossible to rework faulty components.
There is a need, therefore, to increase I/O density for microelectronic devices, without increasing BGA package size or reducing solder joint reliability. in microelectronic devices tends to increase. This trend increases the I/O density requirements for ball grid arrays (BGAs). Thus far, the increase in I/O density requirements has been handled mainly by reducing the solder ball pitch in the BGA. Solder ball pitch is the shortest distance of one ball to the next ball. A reduction in pitch of a BGA requires scaling down the size the solder balls to be proportionally smaller in diameter. However, smaller diameter solder balls produce a smaller standoff height between the package and the PCB and reduce solder joint strength. This reduction in solder ball strength can cause solder joint fatigue during thermal cycling and result in electrically open solder joints.
Under-fill epoxy can be used to improve mechanical solder joint strength and is sometimes used to improve mechanical bonding of the package to the PCB. The under-fill process is expensive, however, and is not conducive to current high volume surface mount technology (SMT) for motherboard manufacturers. The epoxy under-fill process also is problematic with larger BGAs, where under-fill cannot reliability fill under the package completely. Furthermore, the epoxy under-fill process makes it difficult if not impossible to rework faulty components.
There is a need, therefore, to increase I/O density for microelectronic devices, without increasing BGA package size or reducing solder joint reliability.